Atmel AVR XMEGA 8/16-bit High Performance Low Power Flash Microcontrollers Scheda Tecnica Pagina 84
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XMEGA B1 [DATASHEET]
Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014
Table 36-26. External Clock with Prescaler
(1)
for System Clock
Notes: 1. System Clock Prescalers must be set so that maximum CPU clock frequency for device is not exceeded.
2. The maximum frequency vs. supply voltage is linear between 1.8V and 2.7V, and the same applies for all other parameters with supply voltage conditions.
36.14.7 External 16MHz Crystal Oscillator and XOSC Characteristics
Table 36-27. External 16MHz Crystal Oscillator and XOSC Characteristics
Symbol Parameter Condition Min. Typ. Max. Units
1/t
CK
Clock frequency
(2)
V
CC
= 1.6 - 1.8V 0 90
MHz
V
CC
= 2.7 - 3.6V 0 142
t
CK
Clock period
V
CC
= 1.6 - 1.8V 11
ns
V
CC
= 2.7 - 3.6V 7
t
CH
Clock high time
V
CC
= 1.6 - 1.8V 4.5
V
CC
= 2.7 - 3.6V 2.4
t
CL
Clock low time
V
CC
= 1.6 - 1.8V 4.5
V
CC
= 2.7 - 3.6V 2.4
t
CR
Rise time (for maximum frequency)
V
CC
= 1.6 - 1.8V 1.5
V
CC
= 2.7 - 3.6V 1.0
t
CF
Fall time (for maximum frequency)
V
CC
= 1.6 - 1.8V 1.5
V
CC
= 2.7 - 3.6V 1.0
t
CK
Change in period from one clock cycle to the next 10 %
Symbol Parameter Condition Min. Typ. Max. Units
Cycle to cycle jitter
XOSCPWR=0, FRQRANGE=0 0
ns
XOSCPWR=0, FRQRANGE=1, 2, or 3 0
XOSCPWR=1 0
Long term jitter
XOSCPWR=0, FRQRANGE=0 0
XOSCPWR=0, FRQRANGE=1, 2, or 3 0
XOSCPWR=1 0
Frequency error
XOSCPWR=0, FRQRANGE=0 0.03
%
XOSCPWR=0, FRQRANGE=1 0.03
XOSCPWR=0, FRQRANGE=2 or 3 0.03
XOSCPWR=1 0.03
Duty cycle
XOSCPWR=0, FRQRANGE=0 50
XOSCPWR=0, FRQRANGE=1 50
XOSCPWR=0, FRQRANGE=2 or 3 50
XOSCPWR=1 50
- ATxmega128B1 / ATxmega64B1 1
- 1. Ordering Information 2
- Typical Applications 3
- 2. Pinout/Block Diagram 4
- Top view 5
- Bottom view 5
- 3. Overview 6
- 4. Resources 8
- 5. Capacitive Touch Sensing 8
- 6. AVR CPU 9
- XMEGA B1 [DATASHEET] 10
- 6.4.1 Hardware Multiplier 10
- 7. Memories 12
- 7.3.1 Application Section 13
- 7.3.3 Boot Loader Section 13
- 7.3.5 User Signature Row 14
- 9. Event System 18
- 11.3.1 Idle Mode 23
- 11.3.2 Power-down Mode 23
- 11.3.3 Power-save Mode 24
- 11.3.4 Standby Mode 24
- 11.3.5 Extended Standby Mode 24
- 12. System Control and Reset 25
- 13. WDT – Watchdog Timer 27
- 15. I/O Ports 30
- 15.3.5 Others 32
- 22. TWI – Two-wire Interface 42
- 24. USART 44
- 26. AES and DES Crypto Engine 46
- 30. AC – Analog Comparator 51
- Figure 30-2 52
- 31. Programming and Debugging 53
- 32. Pinout and Pin Functions 54
- 34. Instruction Set Summary 62
- 35. Packaging Information 67
- 35.2 7A1 68
- Safe Operating Area 70
- 36.3 DC Characteristics 71
- Wake-up request 74
- Clock output 74
- Wake-up time 74
- 36.5 I/O Pin Characteristics 75
- 36.7 ADC Characteristics 76
- Device internal 86
- External 86
- 32.768 kHz crystal 86
- 36.15 SPI Characteristics 87
- 37. Typical Characteristics 91
- Temp [°C] 93
- Icc [µA] 97
- 37.2 I/O Pin Characteristics 99
- I/O pin read as “0” 104
- 37.3 ADC Characteristics 105
- Figure 37-31. ADC DNL vs. V 106
- Figure 37-32. ADC DNL vs. V 106
- = 3.6V, external reference 107
- SE Unsigned mode, V 107
- = 1.0V, external reference 107
- Gain Error [mV] 109
- CURRENTSOURCE 115
- 37.6 BOD Characteristics 116
- THRESHOLD 121
- Frequency [MHz] 126
- Frequency Step Error [%] 127
- Frequency Step size [%] 127
- Frequency (MHz) 129
- 37.9 PDI Characteristics 131
- 37.10 LCD Characteristics 132
- Frame Rate[Hz] 133
- Contrast 133
- 38. Errata 136
- Problem fix/Workaround 137
- 39.5 8330D – 01/2013 139
- 39.6 8330C – 07/2012 139
- 39.7 8330B – 02/2012 139
- 39.8 8330A – 10/2011 139
- Table Of Contents 141
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