Atmel Evaluation Board AT91SAM9XE-EK Manuale Utente Pagina 13

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Board Description
AT91SAM9260-EK Evaluation Board User Guide 3-3
6234C–ATARM–22-Mar-07
High-Drive Capability on Ouputs TIOA0, TIOA1, TIOA2
One Two-wire Interface (TWI)
Master, Multi-master and Slave Mode Operation
General Call Supported in Slave Mode
Connection to PDC Channel To Optimize Data Transfers in Master Mode Only
IEEE
®
1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
1.65V to 1.95V for VDDBU, VDDCORE, VDDOSC and VDDPLL
3.0V to 3.6V for VDDIOP0, VDDIOP1 (Peripheral I/Os) and VDDANA (Analog to
Digital Converter)
Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os)
Available in a 208-lead PQFP and 217-ball LFBGA Package
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