Atmel AVR AT90S8515-4 Specifiche Scaricare il pdf (Pagina 75)

75

AT90S8515

0841G–09/01

Figure 54. Port D Schematic Diagram (Pin PD1)

Figure 55. Port D Schematic Diagram (Pins PD2 and PD3)

DATA BUS

D

D

Q

Q

RESET

RESET

C

C

WD

WP

RD

RP

RL

MOS

PULL-

UP

PD1

R

R

WP:

WD:

RL:

RP:

RD:

TXD:

TXEN:

WRITE PORTD

WRITE DDRD

READ PORTD LATCH

READ PORTD PIN

READ DDRD

UART TRANSMIT DATA

UART TRANSMIT ENABLE

DDD1

PORTD1

TXEN

TXD

1 2 ... 70 71 72 73 74 75 76 77 78 79 80 ... 111 112

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